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IEEE Paper title :
Modular Multiplication and Exponentiation Architectures for Fast RSA Cryptosystem Based on Digit Serial Computation.
Paper Domain : IEEE Transactions On Industrial Electronics
Paper Authors :
Gustavo D. Sutter, Member, IEEE,
Jean-Pierre Deschamps,
IEEE Base papers Abstract :
Modular exponentiation with huge modules and exponent,which is usually achieved by recurring modular multiplications,has been commonly used in public key cryptosystems.Typically, the Montgomery’s modular-multiplication algorithm is used since no test department is necessary, and the carry–save addition (CSA) is applied to decrease the crucial direction. In this paper, we boost the Montgomery’s multiplication and propose architectures to execute the least considerable bit first and the most significant bit first methods.
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The designed structure has the following unique characteristics:
1) use of number sequential approach for Montgomery multiplication.
2) Transformation of the CSA representation of advanced multiplication using carry–skip addition. This allows the crucial direction to be decreased, simultaneously with a small-area rate penalty; and
3) precompute the quotient value in Montgomery’s version to be able to rate up the operating frequency. In this document, we existing outcomes in Xilinx Virtex 5 and in 0.18-μm application-specified incorporated routine technology. For reasonable evaluation with past performs, Xilinx Virtex 2 results are revealed. Trial outcomes display that the suggested modular exponentiation and modular-multiplication style acquire the best wait efficiency in contrast to the released performs and outperform them with regards to area–time complexness as well.