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B.E./B.TECH.DEGREE-EXAMINATION-DECEMBER 2009
THIRD SEMESTER-ELECTRONICS &COMMUNICATIONS ENGG.
ELECTRONIC CIRCUITS-I
PART A-(2*10=20)
1. Define stability factor.
2. Draw the fixed bias single stage transistor circuit.
3. Define CMRR.
4. Draw the small signal equivalent circuit of FET.
5. Two amplifiers having gain 20db and 40db are cascaded. Find the overall gain in db.
6. Define bandwidth.
7. What is theoretical maximum conversion efficiency of class A power amplifier.
8. What is distortion in power amplifiers.
9. Draw the full wave bridge rectifier circuit.
10. What are the advantages of SMPS over conventional regulators.
PART B-(5*16=80)
11. A) (i) For the transistor circuit in fig. find the Q-point. Vcc=15v, B=100, VBE=0.7V
(ii) Calculate the stability factor for a fixed bias circuit.
B) Discuss the various techniques of stabilization of Q-point in a transistor.
12. A) For the CC transistor amplifier circuit, find the expressions for input impedance and voltage gain. Assume suitable model for transistor. (Or)
B) (i) Discuss the working of a basic emitter coupled differential amplifier circuit (8)
(ii) Compare CB, CE and CC amplifiers. (8)
13. A) (i) Discuss the frequency response of multistage amplifiers. Calculate the overall upper and lower cutoff frequencies. (10)
(ii) Discuss the terms rise time and sag. (6) (Or)
B) Discuss the high frequency equivalent circuit of FET and hence derive gain bandwidth product for any one configuration.
14. A) (i) Derive the theoretical max conversion efficiency of class B power amplifier. (10)
(ii) Write short notes on power MOSFET amplifier. (6) (Or)
B) Describe the distortion in power amplifier and the methods to eliminate the same.
15. A) Explain the circuit of voltage regulator and also discuss the short circuit protection mechanism. (Or)
B) (i) Explain the power control method using SCR.
(ii) Design zener regulator for following specification Vin=8v to 12v; Vo=10v, RL=10kO. Assume that zener diode is ideal.